Wang, L: Quantum Mechanical Effects On Mosfet Scalinglimit Challenges and Opportunies for Nanoscale CMOS
-
- Englisch ausgewählt
Fr. 104.00
inkl. gesetzl. MwSt.,
Beschreibung
Produktdetails
Einband
Taschenbuch
Erscheinungsdatum
01.01.2009
Verlag
VDMSeitenzahl
196
Maße (L/B/H)
22.2/15.1/1.7 cm
Gewicht
277 g
Sprache
Englisch
ISBN
978-3-8364-6183-2
As CMOS technology continuous to be aggressively
scaled, it approaches a point where classical physics
is insufficient to explain the behavior of a MOSFET.
At this classical physics limit, a quantum mechanical
model becomes necessary to provide thorough
assessment of the device performance and scaling.
This book describes advanced modeling of nanoscale
bulk MOSFETs incorporating critical quantum
mechanical effects such as gate direct tunneling and
energy quantization of carriers.
The models derived here are used to project MOSFET
scaling limits. These limits of bulk MOSFETs are
predicted according to various criteria, including
circuit power and delay, device leakage current and
the system uniformity requirement. Tunneling and
quantization effects cause large power dissipation,
low drive current, and strong sensitivities to
process variation, which greatly limit CMOS scaling.
Developing new materials and structures is imminent
to extend the scaling process.
scaled, it approaches a point where classical physics
is insufficient to explain the behavior of a MOSFET.
At this classical physics limit, a quantum mechanical
model becomes necessary to provide thorough
assessment of the device performance and scaling.
This book describes advanced modeling of nanoscale
bulk MOSFETs incorporating critical quantum
mechanical effects such as gate direct tunneling and
energy quantization of carriers.
The models derived here are used to project MOSFET
scaling limits. These limits of bulk MOSFETs are
predicted according to various criteria, including
circuit power and delay, device leakage current and
the system uniformity requirement. Tunneling and
quantization effects cause large power dissipation,
low drive current, and strong sensitivities to
process variation, which greatly limit CMOS scaling.
Developing new materials and structures is imminent
to extend the scaling process.
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