Sekar, D: Optimal Interconnect Networks for 2D and 3D Microc
-
- Englisch ausgewählt
Fr. 83.90
inkl. gesetzl. MwSt.,
Beschreibung
Produktdetails
Einband
Taschenbuch
Erscheinungsdatum
01.03.2009
Verlag
VDMSeitenzahl
108
Maße (L/B/H)
22/15/0.9 cm
Gewicht
209 g
Sprache
Englisch
ISBN
978-3-639-07395-9
We are today in the era of gigascale 2D and 3D
integrated circuits. These microchips are typically
considered to be "interconnect limited", with
performance limited by signal, power, clock and
thermal interconnect networks. Techniques to tackle
this interconnect challenge are proposed and
quantitatively evaluated in this book. Topics
described by the author include integrated
microchannel cooling of 3D stacked dice, repeater
insertion models, carbon nanotube interconnects,
parallel processing architectures, electromigration
avoidance methods and a CAD tool to co-design
signal, power, clock and thermal interconnect
networks of microchips. This book should be
especially useful to students and professionals in
the areas of microelectronics, VLSI design,
packaging and computer architecture.
integrated circuits. These microchips are typically
considered to be "interconnect limited", with
performance limited by signal, power, clock and
thermal interconnect networks. Techniques to tackle
this interconnect challenge are proposed and
quantitatively evaluated in this book. Topics
described by the author include integrated
microchannel cooling of 3D stacked dice, repeater
insertion models, carbon nanotube interconnects,
parallel processing architectures, electromigration
avoidance methods and a CAD tool to co-design
signal, power, clock and thermal interconnect
networks of microchips. This book should be
especially useful to students and professionals in
the areas of microelectronics, VLSI design,
packaging and computer architecture.
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