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Produktbild: VHDL Examples

VHDL Examples Xilinx Spartan-3 Version

Fr. 173.00

inkl. gesetzl. MwSt., Versandkostenfrei

Beschreibung

Produktdetails

Einband

Gebundene Ausgabe

Erscheinungsdatum

01.11.2007

Verlag

John Wiley & Sons

Seitenzahl

468

Maße (L/B/H)

26/18.3/3 cm

Gewicht

1074 g

Auflage

1. Auflage

Sprache

Englisch

ISBN

978-0-470-18531-5

Beschreibung

Rezension

"The book is well organized and contains many useful synthesizable VHDL examples. Moreover, design concepts are clearly explained ... This book is indeed an excellent text for people who wish to learn PFGA and VHDL from practical examples and exercises." (Computing Reviews, February 18, 2009)
 
"Brimming with code examples, flowcharts and other illustrations, the book serves as a good starting point for a development project. It's recommended to anyone looking to get started with FPGA prototyping using VHDL." (Electronic Design, February 4, 2008)
 
"It's recommended to anyone looking to get started with FGPA prototyping using VHDL." (Electronic Design Online, February 4, 2008)

Produktdetails

Einband

Gebundene Ausgabe

Erscheinungsdatum

01.11.2007

Verlag

John Wiley & Sons

Seitenzahl

468

Maße (L/B/H)

26/18.3/3 cm

Gewicht

1074 g

Auflage

1. Auflage

Sprache

Englisch

ISBN

978-0-470-18531-5

Herstelleradresse

Libri GmbH
Europaallee 1
36244 Bad Hersfeld
DE

Email: GPSR Kontakt

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Die Leseprobe wird geladen.
  • Produktbild: VHDL Examples
  • Preface.
     
    Acknowledgments.
     
    PART I: BASIC DIGITAL CIRCUITS.
     
    1. Gate-level combinational circuit.
     
    1.1 Introduction.
     
    1.2 General description.
     
    1.3 Structural description.
     
    1.4 Testbench.
     
    1.5 Bibliographic notes.
     
    1.6 Suggested experiments.
     
    2. Overview of FPGA and EDA software.
     
    2.1 Introduction.
     
    2.2 FPGA.
     
    2.3 Overview of Digilent S3 board.
     
    2.4 Design flow.
     
    2.5 Overview of Xilinx ISE project navigator.
     
    2.6 Short tutorial of ISE project navigator.
     
    2.7 Short tutorial of ModelSim HDL simulator.
     
    2.8 Bibliographic notes.
     
    2.9 Suggested experiments.
     
    3. RT-level combinational circuit.
     
    3.1 Introduction.
     
    3.2 RT-level components.
     
    3.3 Routing circuit with concurrent assignment statements.
     
    3.4 Modeling with process.
     
    3.5 Routing circuit with if and case statements.
     
    3.6 Constant and generic.
     
    3.7 Design examples.
     
    3.8 Bibliographic notes.
     
    3.9 Suggested experiments.
     
    4. Regular Sequential Circuit.
     
    4.1 Overview.
     
    4.2 HDL code of FF and register.
     
    4.3 Simple design examples.
     
    4.4 Testbench for sequential circuits.
     
    4.5 Case study.
     
    4.6 Bibliographic notes.
     
    4.7 Suggested experiments.
     
    5. FSM.
     
    5.1 Overview.
     
    5.2 FSM code development.
     
    5.3 Design examples.
     
    5.4 Bibliographic notes.
     
    5.5 Suggested experiments.
     
    6. FSMD.
     
    6.1 Overview.
     
    6.2 Code development of FSMD.
     
    6.3 Design examples.
     
    6.4 Bibliographic notes.
     
    6.5 Suggested experiments.
     
    PART II: I/O MODULES.
     
    7. UART.
     
    7.1 Overview.
     
    7.2 UART receiving subsystem.
     
    7.3 UART transmitting subsystem.
     
    7.4 Overall UART system.
     
    7.5 Customizing the UART.
     
    7.6 Bibliographic notes.
     
    7.7 Suggested experiments.
     
    8. PS2 Keyboard.
     
    8.1 Overview.
     
    8.2 PS2 receiving subsystem.
     
    8.3 PS2 keyboard scan code.
     
    8.4 PS2 keyboard interface circuit.
     
    8.5 Bibliographic notes.
     
    8.6 Suggested experiments.
     
    9. PS2 Mouse.
     
    9.1 Overview.
     
    9.2 PS2 mouse protocol.
     
    9.3 PS2 transmitting subsystem.
     
    9.4 Bidirectional PS2 interface.
     
    9.5 PS2 mouse interface.
     
    9.6 Bibliographic notes.
     
    9.7 Suggested experiments.
     
    10. External SRAM.
     
    10.1 Introduction.
     
    10.2 Specification of the IS61LV25616AL SRAM.
     
    10.3 Basic memory controller.
     
    10.4 A safe design.
     
    10.5 More aggressive design.
     
    10.6 Bibliographic notes.
     
    10.7 Suggested experiments.
     
    11. Xilinx Spartan-3 Specific Memory.
     
    11.1 Introduction.
     
    11.2 Embedded memory of Spartan-3 device.
     
    11.3 Method to incorporate memory modules.
     
    11.4 HDL templates for memory inference.
     
    11.5 Bibliographic notes.
     
    11.6 Suggested experiments.
     
    12. VGA controller I: graphic.
     
    12.1 Introduction.
     
    12.2 VGA synchronization.
     
    12.3 Overview of pixel generation circuit.
     
    12.4 Graphic generation with object-mapped scheme.
     
    12.5 Graphic generation with bit-mapped scheme.
     
    12.6 Suggest experiments.
     
    13. VGA controller II: text.
     
    13.1 Introduction.
     
    13.2 Text generation.
     
    13.3 Full-screen text display.
     
    13.4 The