Band 66
Switch-Level Timing Simulation of MOS VLSI Circuits
-
- Hardcover
- Taschenbuch ausgewählt
- eBook
-
Sprache:Englisch
Fr. 143.00
inkl. gesetzl. MwSt.,
Beschreibung
Produktdetails
Einband
Taschenbuch
Erscheinungsdatum
05.10.2011
Verlag
Springer UsSeitenzahl
210
Maße (L/B/H)
23.5/15.5/1.3 cm
Gewicht
347 g
Auflage
1989
Sprache
Englisch
ISBN
978-1-4612-8963-0
Only two decades ago most electronic circuits were designed with a slide-rule, and the designs were verified using breadboard techniques. Simulation tools were a research curiosity and in general were mistrusted by most designers and test engineers. In those days the programs were not user friendly, models were inadequate, and the algorithms were not very robust. The demand for simulation tools has been driven by the increasing complexity of integrated circuits and systems, and it has been aided by the rapid decrease in the cost of com puting that has occurred over the past several decades. Today a wide range of tools exist for analYSiS, deSign, and verification, and expert systems and synthesis tools are rapidly emerging. In this book only one aspect of the analysis and design process is examined. but it is a very important aspect that has received much attention over the years. It is the problem of accurate circuit and timing simulation.
Noch keine Bewertungen vorhanden
Verfassen Sie die erste Bewertung zu diesem Artikel
Helfen Sie anderen Kundinnen und Kunden durch Ihre Meinung.