Designing TSVs for 3D Integrated Circuits
Aus der Reihe
SpringerBriefs in Electrical and Computer Engineering
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- Taschenbuch ausgewählt
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Sprache:Englisch
Fr. 73.90
inkl. gesetzl. MwSt.,
Beschreibung
Produktdetails
Einband
Taschenbuch
Erscheinungsdatum
23.09.2012
Abbildungen
X, 76 p. 34 illus., 29 illus. in color.
Verlag
Springer UsSeitenzahl
76
Maße (L/B/H)
23.5/15.5/0.5 cm
Gewicht
165 g
Sprache
Englisch
ISBN
978-1-4614-5507-3
This book explores the challenges and presents best strategies for designing Through-Silicon Vias (TSVs) for 3D integrated circuits. It describes a novel technique to mitigate TSV-induced noise, the GND Plug, which is superior to others adapted from 2-D planar technologies, such as a backside ground plane and traditional substrate contacts. The book also investigates, in the form of a comparative study, the impact of TSV size and granularity, spacing of C4 connectors, off-chip power delivery network, shared and dedicated TSVs, and coaxial TSVs on the quality of power delivery in 3-D ICs. The authors provide detailed best design practices for designing 3-D power delivery networks. Since TSVs occupy silicon real-estate and impact device density, this book provides four iterative algorithms to minimize the number of TSVs in a power delivery network. Unlike other existing methods, these algorithms can be applied in early design stages when only functional block- level behaviors and a floorplan are available. Finally, the authors explore the use of Carbon Nanotubes for power grid design as a futuristic alternative to Copper.
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