Designing TSVs for 3D Integrated Circuits
Aus der Reihe
SpringerBriefs in Electrical and Computer Engineering
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Form:Einzelkauf Download
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Sprache:Englisch
Fr. 62.90
inkl. gesetzl. MwSt.Beschreibung
Produktdetails
Format
Kopierschutz
Nein
Family Sharing
Nein
Text-to-Speech
Nein
Erscheinungsdatum
22.09.2012
Verlag
Springer New YorkSeitenzahl
76 (Printausgabe)
Dateigröße
2697 KB
Sprache
Englisch
EAN
9781461455080
This book explores the challenges and presents best strategies for designing Through-Silicon Vias (TSVs) for 3D integrated circuits. It describes a novel technique to mitigate TSV-induced noise, the GND Plug, which is superior to others adapted from 2-D planar technologies, such as a backside ground plane and traditional substrate contacts. The book also investigates, in the form of a comparative study, the impact of TSV size and granularity, spacing of C4 connectors, off-chip power delivery network, shared and dedicated TSVs, and coaxial TSVs on the quality of power delivery in 3-D ICs. The authors provide detailed best design practices for designing 3-D power delivery networks. Since TSVs occupy silicon real-estate and impact device density, this book provides four iterative algorithms to minimize the number of TSVs in a power delivery network. Unlike other existing methods, these algorithms can be applied in early design stages when only functional block- level behaviors and a ¿oorplan are available. Finally, the authors explore the use of Carbon Nanotubes for power grid design as a futuristic alternative to Copper.
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